EMEAPast event
Verification Futures UK 2026
UK chip verification and design conference
About this event
Verification Futures UK, run by Tessolve, covers formal methods, RISC-V verification, AI in DV and hardware/software co-verification, with a dedicated UKESF student track.
Social media & coverage
“Detailed speakers-and-sessions preview published the day before the event.”
collins.amyOpen on asicpro.com
“Post-event reflection on conversations and takeaways from the conference, posted about a week afterwards.”
Soham SenOpen on linkedin.com
“Post-event photo recap noting 60 Scholars from 22 universities, supported by 36 organisations, attended.”
Speakers
EA
Ekaterina Almasque
Co-founder & Managing Partner
Blank Page Capital
ConsultantKeynote Address
KH
Kartik Hegde
Sr Group Director
Cadence
VendorPlatinum Sponsor Presentation
DT
Dr. Tobias Ludwig
CEO
LUBIS EDA
VendorLatest Verification Methods
MB
Mike Bartley
SVP - VLSI Design
Alpinum Consulting
ConsultantWelcome Note
RM
Ryan Marquess
University of Southampton
AcademiaVerification Projects using Open Source/License-Free Tools
SK
Sam Kennedy
University of Southampton
AcademiaVerification Projects using Open Source/License-Free Tools
BH
Bob Hart
University of Southampton
AcademiaVerification Projects using Open Source/License-Free Tools
LS
Lia Smith
University of Southampton
AcademiaVerification Projects using Open Source/License-Free Tools
DC
Darwin Chan
University of Southampton
AcademiaVerification Projects using Open Source/License-Free Tools
SS
Surinder Sood
ARM
CustomerLatest Verification Methods: Contract-Based Framework for Scalable Compositional Verification
NC
Noam Cohen
Keplertech
CustomerVerification Projects using Open Source/License-Free Tools
SK
Sai Karthik Madabhushi
Synopsys
VendorLatest Verification Methods
JS
Jerome Sauger
Axelera AI
CustomerVerification Projects using Open Source/License-Free Tools
CA
Christian Appold
Denso
CustomerLatest Verification Methods
DC
Doug Carson
Keysight Technologies
VendorVerification Projects; Design track
DM
Darron May
Director of AI Product Management
Siemens EDA
VendorAgentic AI and the Rise of the Design & Verification Scientist
AM
Ahmed Mansour
Alpinum Consulting
ConsultantMixed Signal
MT
Matthew Taylor
Senior Member of Technical Staff
Doulos
ConsultantAfternoon Verification Session
MA
Marcel Ahmedzai
Cadence Design Systems
VendorMixed Signal
KP
Kishan Pethani
AMD
CustomerAfternoon Verification Session
VZ
Vladimir Zivkovic
Siemens EDA
VendorMixed Signal
ND
Neil Dickins
IC Resources
ConsultantChip Star Wars - The Next Generation
CY
Chris Yates
Thalia Design Automation
VendorMixed Signal
AB
Abhyarthana Bisoyi
Odisha University of Technology and Research
AcademiaMain Afternoon
KC
Katharina Ceesay-Seitz
ETH Zurich
AcademiaMain Afternoon
SV
Shivayogi V Kerudi
Asst. Director of Engineering
Tessolve
VendorAI in DV
CM
Cristian Macario
MathWorks
VendorMain Afternoon
DR
Dr. Ramesh Krishnamurthy
APRIL AI Hub Research
AcademiaAI in DV
LK
Levon Khachatryan
Voskenai Ltd
CustomerAI Design IP
AM
Alexander Montgomerie-Corcoran
Heronic Technologies
CustomerAI Design IP
GC
Greg Chadwick
Fractile
CustomerAI Design IP
JL
James Lewis
RED Semiconductor International Ltd
CustomerAI Design IP
VP
Valentin Peltier
Secure-IC - A Cadence company
VendorDesign
YE
Yassine Eben Aimine
Siemens EDA
VendorFPGA
LP
Lloyd Peto
NanoScope Services Ltd
ConsultantDesign
GL
Gavin Lofts
Altera
CustomerFPGA
SG
Steinn Gustafsson
Chevin Technology
ConsultantFPGA
JD
John Darlington
Arm / University of Southampton
CustomerDesign
RM
Rojalin Mishra
Riverlane
CustomerFPGA
GD
Gaetano De Martino
KETS Quantum Security Ltd
CustomerStartups and Breakthrough Technologies
PR
Prof. Rob Young
Quantum Base
AcademiaStartups and Breakthrough Technologies
SS
Simon Southwell
Wyvern Semiconductors
CustomerFPGA
PP
Phill Payne
Novomorphic
CustomerFPGA
KA
Kareem Ab
Synopsys
VendorStartups and Breakthrough Technologies